1. Field of the Invention
The present invention relates to a channel controlling device, and more particularly to a storage device control circuit capable of adjusting the data output order of a plurality of channels.
2. Description of the Prior Art
Developments in technology for storage devices have increased their data storage amount, thereby increasing the difficulty of reading data stored in the storage device. A plurality of data channels is utilized to increase the read speed of a flash memory, wherein the data read from the flash memory is decoded in advance, and then sent to a host. The decoder of the flash memory cannot receive data from multiple channels at the same time. An arbitration circuit is therefore utilized to determine an output order of multiple channels so the channels can be controlled to output data to the decoder according to the output order. The output order needs to be dynamically adjustable, however. For example, when the current output order is incorrect, the arbitration circuit should be capable of instantly correcting the output order. Hence, how to provide a storage device control circuit that can dynamically adjust the channel output data order is an issue to be solved in this field.